RED Semiconductor


Our vision is to enable AI to be everywhere, instantaneous, and secure

Introducing VISC

RED's VISC microprocessor architecture (Versatile Intrinsic Structured Computing), achieves massive execution efficiency for AI, Autonomy, Cryptography and other applications.

  • VISC uses specialised instructions which cause compression of complex mathematical routines and optimise for parallel execution of repetitive elements of the algorithms.

  • It delivers up to 100X the efficiency of today’s microprocessors for ubiquitous algorithms used in AI/ML, encryption, codecs, etc.
  • It embeds functionality like PUF (Physically Unclonable Function) and TRNG (True Random Number Generation) analysis, critical to secure applications and cryptography.

  • Its Single-Issue; Multi-Execute (SiMex™) architecture makes it inherently low-power.

  • VISC is delivered as an architecture or IP cores for RISC-V devices (other ISAs can be supported for lead partners), assuring compatibility with developers’ code, and enabling Linux support.

  • It is simple for developers to learn and implement – new VISC instructions open up the world of parallel execution optimisation. Standard RISC-V instructions and custom extensions can all be vectorised and efficiently executed using a single bank of registers. Standard toolchains are used, and the VISC core automatically optimises execution sequencing of vector routines.

RED Addrress The Global Compute Challenges

Algorithmic computation chart

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