RED Semiconductor
Independent innovation in high performance computing
Our mission is to deliver a high performance microprocessor family (Vantage) optimised for our Revolutionary Vector Instruction Prefix (Vector +1) for the POWER® ISA that speeds up product development, increases performance and cuts power consumption for complex computation applications.
RED Semiconductor
Who we are
New approach to high-end computing
Innovation Proven
Grant funding from NLnet Foundation and NGI Pointer (European non-profit advanced technology funds) of around $1million has thus far been deployed by Libre-SOC to develop and test a break-through approach to high-end microprocessors. The key innovation focuses on vector instructions which allow complex real-time algorithmic computation to be executed more efficiently in terms of speed and power consumption, and for code to be developed quicker by smaller teams.
Named Vector+1, the optimised vector code will run on a unique microprocessor platform called SVP64, designed by RED Semiconductor. Supporting native Power ISA and translated x86 and ARM instructions, SVP64 will enable developers to break free from the constraints of traditional processing platforms, with a rapid conversion to SVP64 hardware and code architecture.
The world's first fully hardware-auditable microprocessor
Uniquely secure processing architecture
RED Semiconductor will deliver variants of its scalable SVP64 microprocessor chipset for key market sectors including IoT, Edge and secure computing applications, embedded and autonomous systems, and next generation smart devices. Additionally, as a fully IP-independent entity, the company will license its SVP64 core and Vector+1 ISA to major global organisations to enable them to deliver performance beyond the constraints of today’s x86 and ARM instruction sets, and simultaneously reduce the carbon footprint of their compute power.
Chipsets and licensed cores
Through unique collaboration with open-source developers Libre-SOC, RED Semiconductor will deliver the first fully hardware-auditable microprocessor capable of real-time cryptographic computation, making it ideal for secure computing applications.
Quick and open software development flow into a secure microprocessor platform
VECTOR+1
- Vector prefix to standard ISAs
- No additional instructions
- Supported by established design tools and flow.
SVP64
- Stable and robust true-RISC ISA
- Guaranteed performance from controlled instruction set platform
- Supported by established design tools and flow.
VANTAGE
- Supercomputer methodology for GPU applications
- Low-power, low-cost, high performance IP- and fab-independent.